In recent years, the development of through-hole electrode substrates arranged with a conductive part which conducts a top surface and rear surface of a substrate as an interposer between LSI chips is progressing. This type of through-hole electrode substrate is formed with a through-hole electrode by filling a conductive material using electrolytic plating and the like within a through-hole.
A LSI chip which has a narrow pitch and wiring with short dimensions is arranged on an upper surface of a through-hole electrode substrate. In addition, a semiconductor mounted substrate which has a wide pitch and wiring with long dimensions is arranged on the rear surface of a through-hole electrode substrate. The documents (see, for example, Japanese Patent Application No, 2005-514387, Japanese Patent Application No, 2010-548586, Japanese Patent Application No. 2003-513037, Japanese Patent Application No, 2011-528851, PCT Publication 2010/087483, PCT Publication 2005/034594, PCT Publication 2003/007370, PCT Publication 2011/024921, Japanese Patent No. 4241202 Specification, Japanese Patent No. 4203277 Specification, Japanese Patent No. 4319831 Specification, Japanese Patent No. 4022180 Specification, Japanese Patent No. 4564342 Specification, Japanese Patent No. 4835141 Specification, Japanese Patent No. 5119623 Specification, Japanese Laid Open Patent No. 2009-23341, Japanese Patent No. 2976955 Specification, Japanese Laid Open Patent No. 2003-243396, Japanese Laid Open Patent No. 2003-198069 and Japanese Patent No. 4012375 Specification) are conventional technologies of a through-hole electrode substrate.
In the through-hole electrode, a conductive material is filled into a through-hole as a filler as described above, or a conductive film is formed along the side wall of the through-hole and an insulating resin is filled to the remainder of the through-hole. In the through-hole electrode, a technique is known in which the interior of the through-hole is provided with a taper or a plurality of crater shaped irregularities is formed inside the through-hole in order to prevent dropout of a filler filled in the through-hole (see, for example, Japanese Patent Application No. 2003-513037 and Japanese Patent Application No. 2011-528851).
However, even when attempting to prevent dropout of the filler by such a technique, a gap is generated between the filler and the side wall of the through-hole and a gas reservoir may be generated. When heat is applied to the substrate in this state, in the prior art there is a possibility that gas which has collected into a gas reservoir expands causing destruction of the through-hole or filler which causes defects such as dropout of the filler.
Therefore, the embodiment of the invention has been made in view of such problems and provides a through-hole electrode substrate and semiconductor device which can eliminate defects due to gas collecting in a gas reservoir in a through-hole and allows prevention of dropout of a filler from within the through-hole.